74vhc257 quad 2 channel multiplexer (3-state) june 1999 n high speed: t pd = 3.7 ns (typ.) at v cc =5v n low power dissipation: i cc =4 m a (max.) at t a =25 o c n high noise immunity: v nih =v nil = 28% v cc (min.) n power down protection on inputs n symmetrical output impedance: |i oh |=i ol = 8 ma (min) n balanced propagation delays: t plh @ t phl n operating voltage range: v cc (opr) = 2v to 5.5v n pin and function compatible with 74 series 257 n improved latch-up immunity n lownoise v olp = 0.8v (max.) description the 74vhc257 is an advanced high-speed cmos quad 2 channel multiplexer (3-state) fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos technology. it is composed of four independent 2 channel multiplexers with common select and enable input. the 74vhc257 is a non inverting multiplexer. when the enable input is held ohigho, all outputs become high impedance state. if select input is held olowo, oao data is selected, when select input is ohigho, obo data is chosen. power down protection is provided on all inputs and 0 to 7v can be accepted on inputs with no regard to the supply voltage. this device can be used to interface 5v to 3v. all inputs and outputs are equipped with protection circuits against static discharge, giving them 2kv esd immunity and transient excess voltage. pin connection and iec logic symbols m (micro package) t (tssop package) order codes : 74vhc257m 74VHC257T ? 1/9
input equivalent circuit logic diagram pin description pin no symbol name and function 1 select common data select input 2, 5, 14, 11 1a to 4a data input from source a 3, 6, 13, 10 1b to 4b data inputs from source b 4, 7, 12, 9 1y to 4y 3 state multiplexer outputs 15 oe 3 state output enable inputs (active low) 8 gnd ground (0v) 16 v cc positive supply voltage truth table input s outputs oe sele ct a b y hxxxz lllxl llhxh lhxll lhxhh x = don't care z = high impedance this logic diagram has not be used to estimate propagation delays 74vhc257 2/9
absolute maximum ratings symbol parameter value unit v cc supply voltage -0.5 to +7.0 v v i dc input voltage -0.5 to +7.0 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current - 20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 50 ma t stg storage temperature -65 to +150 o c t l lead temperature (10 sec) 300 o c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these condition is not implied. recommended operating conditions symbol parameter value unit v cc supply voltage 2.0 to 5.5 v v i input voltage 0 to 5.5 v v o output voltage 0 to v cc v t op operating temperature -40 to +85 o c dt/dv input rise and fall time (see note 1) (v cc =3.3 0.3v) (v cc =5.0 0.5v) 0 to 100 0to20 ns/v ns/v 1) v in from 30% to70%of v cc dc specifications symbol parameter test conditions value unit v cc (v) t a =25 o c -40 to 85 o c min. typ. max. min. max. v ih high level input voltage 2.0 1.5 1.5 v 3.0 to 5.5 0.7v cc 0.7v cc v il low level input voltage 2.0 0.5 0.5 v 3.0 to 5.5 0.3v cc 0.3v cc v oh high level output voltage 2.0 i o =-50 m a 1.9 2.0 1.9 v 3.0 i o =-50 m a 2.9 3.0 2.9 4.5 i o =-50 m a 4.4 4.5 4.4 3.0 i o =-4 ma 2.58 2.48 4.5 i o =-8 ma 3.94 3.8 v ol low level output voltage 2.0 i o =50 m a 0.0 0.1 0.1 v 3.0 i o =50 m a 0.0 0.1 0.1 4.5 i o =50 m a 0.0 0.1 0.1 3.0 i o =4 ma 0.36 0.44 4.5 i o =8 ma 0.36 0.44 i oz high impedance output leakage current 5.5 v i =v ih or v il v o =v cc or gnd 0.25 2.5 m a i i input leakage current 0 to 5.5 v i = 5.5v or gnd 0.1 1.0 m a i cc quiescent supply current 5.5 v i =v cc or gnd 4 40 m a 74vhc257 3/9
capacitive characteristics symbol parameter test conditions value unit t a =25 o c -40 to 85 o c min. typ. max. min. max. c in input capacitance 4 10 10 pf c out output capacitance 6 pf c pd power dissipation capacitance (note 1) 23 pf 1) c pd isdefined as the value of the ic'sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (refert o test circuit).average operating current can be obtained by the following equation. i cc (opr) = c pd ? v cc ? f in +i cc /4 (per channel) ac electrical characteristics (input t r =t f =3 ns) symbol parameter test condition value unit v cc (v) c l (pf) t a =25 o c -40 to 85 o c min. typ. max. min. max. t plh t phl propagation delay time a, b to y 3.3 (*) 15 5.8 9.3 1.0 11.0 ns 3.3 (*) 50 8.3 12.8 1.0 14.5 5.0 (**) 15 3.6 5.9 1.0 7.0 5.0 (**) 50 5.1 7.9 1.0 9.0 t plh t phl propagation delay time select to y 3.3 (*) 15 7.0 11.0 1.0 13.0 ns 3.3 (*) 50 9.5 14.5 1.0 16.5 5.0 (**) 15 4.0 6.8 1.0 8.0 5.0 (**) 50 5.5 8.8 1.0 10.0 t pzl t pzh output enable time 3.3 (*) 15 6.7 10.5 1.0 12.5 ns 3.3 (*) 50 9.2 14.0 1.0 16.0 5.0 (**) 15 3.6 6.8 1.0 8.0 5.0 (**) 50 5.1 8.8 1.0 10.0 t plz t phz output disable time 3.3 (*) 50 8.6 12.0 1.0 13.5 ns 5.0 (**) 50 5.7 7.9 1.0 9.0 (*) voltage range is 3.3v 0.3v (**) voltage range is 5v 0.5v dynamic switching characteristics symbol parameter test conditions value unit v cc (v) t a =25 o c -40 to 85 o c min. typ. max. min. max. v olp dynamic low voltage quiet output (note 1, 2) 5.0 c l =50pf 0.3 0.8 v v olv -0.8 -0.3 v ihd dynamic high voltage input (note 1, 3) 5.0 3.5 v ild dynamic low voltage input (note 1, 3) 5.0 1.5 1) worst case package. 2) max number of outputs defined as (n). data inputs are driven 0v to 5.0v, (n -1) outputs switching and one output at gnd. 3) max number of data inputs (n) switching. (n-1) switching 0v to5.0v. inputs under test switching: 5.0v to threshold (v ild ), 0v to threshold (v ihd ), f=1mhz. 74vhc257 4/9
waveform 1: propagation delays for inverting conditions (f=1mhz; 50% duty cycle) test circuit test switch t plh ,t phl open t pzl ,t plz v cc t pzh ,t phz gnd c l = 15/50 pf or equivalent (includes jig and probe capacitance) r l =r 1 =1k w orequivalent r t =z out of pulse generator (typically 50 w ) 74vhc257 5/9
waveform 2: propagation delays for non-inverting conditions (f=1mhz; 50% duty cycle) waveform 3: output enable and disable time (f=1mhz; 50% duty cycle) 74vhc257 6/9
dim. mm inch min. typ. max. min. typ. max. a 1.75 0.068 a1 0.1 0.2 0.004 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.019 c1 45 (typ.) d 9.8 10 0.385 0.393 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 f 3.8 4.0 0.149 0.157 g 4.6 5.3 0.181 0.208 l 0.5 1.27 0.019 0.050 m 0.62 0.024 s 8 (max.) p013h so-16 mechanical data 74vhc257 7/9
dim. mm inch min. typ. max. min. typ. max. a 1.1 0.433 a1 0.05 0.10 0.15 0.002 0.004 0.006 a2 0.85 0.9 0.95 0.335 0.354 0.374 b 0.19 0.30 0.0075 0.0118 c 0.09 0.20 0.0035 0.0079 d 4.9 5 5.1 0.193 0.197 0.201 e 6.25 6.4 6.5 0.246 0.252 0.256 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0 o 4 o 8 o 0 o 4 o 8 o l 0.50 0.60 0.70 0.020 0.024 0.028 c e b a2 a e1 d 1 pin 1 identification a1 l k e tssop16 mechanical data 74vhc257 8/9
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a trademark of stmicroelectronics ? 1999 stmicroelectronics printed in italy all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - mexico - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. http://www.st.com . 74vhc257 9/9
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